1. Field of the Invention
The present invention is generally in the field of fabrication of electronic circuit components. In particular, the present invention is in the field of fabrication of transformers used in electronic circuits.
2. Background Art
It is known in the art that there is an ever-present demand for decreasing electronic circuit component sizes and geometries. The demand is fueled, in large part, by the consumers"" desire for ever-smaller communication and information processing devices, such as cellular telephones, laptop computers, and hand-held information assistants. The requirement to decrease the size of these consumer communication and information processing devices has resulted, among other things, in a need to reduce the size of the electronic components these devices contain. As a result, semiconductor device sizes and geometries have decreased dramatically, with each unit area of the semiconductor die supplying greater computing power and functionality. This has resulted in Ultra Large Scale Integration (ULSI) chips containing over a million components per chip. However, the transformer, an off-chip electronic component, has not benefited from this dramatic decrease in size.
The discrete, off-chip transformer suffers from various disadvantages not shared by on-chip electronic components. The off-chip transformer eventually goes through a wire bond for connection to on-chip circuitry. The off-chip transformer also requires assembly of at least two components (i.e. the chip itself and the off-chip transformer). The required assembly of two or more components introduces corresponding reliability issues and also results in a greater manufacturing cost.
By way of background, a transformer is comprised essentially of two cross-coupled inductors. The magnetic coupling between the two inductors is called mutual inductance. Discrete inductors are typically coils wound around a common core. The quality factor (xe2x80x9cQxe2x80x9d) of an inductor is determined by Q=L/R, where L is the inductance and R is the resistance inherent in the inductor. A relatively low quality factor signifies a relatively high energy loss. Since it is desirable to have a large quality factor in an inductor, it is desirable to have a large quality factor in each of the transformer""s separate inductors. This can be accomplished by either increasing the inductance of the inductors, or decreasing their respective resistances.
The problems encountered when attempting to increase inductance or reduce resistance can be illustrated by using the example of an on-chip square spiral inductor. Such an inductor is disclosed in a co-pending United States patent application entitled xe2x80x9cMethod for Fabrication of On-Chip Inductors and Related Structure,xe2x80x9d Ser. No. 09/627,505 filed Jul. 28, 2000, and assigned to the assignee of the present application. The disclosure in that co-pending application is hereby incorporated fully by reference into the present application. As discussed in that co-pending application, the inductance of a conventional on-chip square spiral inductor can be increased by increasing the spiral diameter of the on-chip inductor. However, such an increase would make the conventional on-chip inductor even larger and would require even more chip space. For example, typical inductor values for a square spiral inductor used in mixed signal circuits and in RF applications range from 1 to 100 nano-henrys. If a circuit in a semiconductor chip required a square spiral inductor with a value of 30 nano-henrys and a fabrication process with a metal pitch of 5.0 microns is used, the inductor would require 17 metal turns and would have a spiral diameter of approximately 217 microns. As such, even a 30 nano-henry conventional on-chip inductor would require a considerable amount of chip space.
For the square spiral on-chip inductor in our example, for a given spiral diameter, the inductance is proportional to n2, where n is the number of metal turns. Therefore, the inductance can be increased by increasing the number of turns. However, as the number of metal turns increases, the overall resistance of the metal turns will also increase. The increase in the overall resistance of the inductor will decrease the quality factor of the inductor. Thus, if the on-chip inductor in our example were coupled with another similar on-chip inductor to create a transformer, there would be a significant energy loss in the transformer.
Turning attention again to off-chip transformers, a discrete (i.e. off-chip) transformer also requires relatively long off-chip wires and interconnect lines to connect the transformer terminals to on-chip devices. The relatively long off-chip wires and interconnect lines result in added and unwanted resistance, capacitance, and inductance. Energy would be lost due to this unwanted resistance, capacitance, and inductance. Additionally, the interconnects for off-chip transformers are subject to long-term damage from vibration, corrosion, chemical contamination, oxidation, and other chemical and physical forces. Exposure to vibration, corrosion, chemical contamination, oxidation, and other chemical and physical forces results in lower long-term reliability for off-chip transformers.
Surface-mount packages that integrate both isolation transformers and common mode chokes utilizing the same footprint as discrete transformer-only products have been used to optimize board layout by allowing more functionality in the same amount of space. This approach has been necessitated by the ever higher density requirements of telephony and networking devices such as ISPs, multiplexers, wide area networks (WANS), internetworking interfaces, digital access and cross connect systems (DACS), channel banks and cellular base stations. Although this is an important step in meeting the need for reduced-size transformers, these modules are still discrete devices. They still require board assembly, with its attendant manufacturing cost and reliability issues.
Planar-transformer technology is another attempt at reducing transformer size. In this technology, multiple layers of a multilayer printed circuit board (xe2x80x9cPCBxe2x80x9d) are sandwiched together to form the transformer windings. The core is formed in two sections that reside on the top and bottom of sandwiched windings. This technology reduces the transformer size and provides adequate unit-to-unit repeatability. However, as with surface-mount packages, planar-transformers are discrete devices that still require board assembly.
To applicants"" knowledge, there are no known attempts to fabricate on-chip transformers. However, even if such an attempt were made, it would be very difficult to place a transformer inside the semiconductor die using presently known techniques. Some of the reasons for this difficulty include the following. First, fabricating each of the required on-chip inductors with high inductance values for use as a transformer winding is difficult because the size of the inductor is too large for the semiconductor die. Some of the reasons for the large size of conventional on-chip inductors were discussed above. Thus, the individual inductor""s size limits the use of on-chip inductors to build on-chip transformers for RF and mixed signal circuits. Second, the inductor""s quality factor would be too low. As explained above, when a higher inductance is desired and is achieved by increasing the number of metal turns, i.e. the windings, of the inductor, the corresponding increase in the resistance of the inductor results in a lower quality factor.
Thus, there is a need in the art for a transformer that has a small size, high quality factor inductor windings, is reliable, cost-effective, and which does not require connections through off-chip wires or off-chip interconnect lines.
The present invention is directed to on-chip transformers. The present invention discloses a transformer which has a small size, high quality factor inductor windings, is reliable, cost-effective, and which does not require connections through off-chip wires or off-chip interconnect lines.
In an exemplary embodiment of the invention""s transformer, the transformer comprises a dielectric area. For example, the dielectric area can consist of three different dielectric layers. Also, by way of example, the dielectric area can comprise silicon dioxide or a low-k dielectric. According to the exemplary embodiment, the dielectric area is interspersed with a permeability conversion material. The permeability conversion material has a permeability higher than the permeability of the dielectric area. For example, the permeability conversion material can be nickel, iron, nickel-iron alloy, or magnetic oxide.
The exemplary embodiment of the invention""s transformer further comprises a first conductor and also a second conductor patterned into the dielectric area. The first and/or the second conductor can comprise, for example, copper, aluminum, or a copper-aluminum alloy. Each of the first and second conductors are made up of a number of turns which result in, respectively, the primary and secondary windings of the exemplary embodiment of the invention""s transformer.